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TPS51200DRCR: DDR Termination Regulator — Guide
TPS51200DRCR guide: DDR SDRAM termination regulator from TI, features and sourcing.
TPS51200DRCR guide: DDR SDRAM termination regulator from TI, features and sourcing.
The TPS51200DRCR is a sink/source DDR termination regulator from TI. This guide covers its specs and procurement.
By Vigny (深圳市华芯购电子有限公司) · Published 2026-09-27 · Data verified 2026-09-29 · Sources: manufacturer datasheets & HuaXinGou stock verification
The TPS51200 provides a 2A sink/source DDR termination voltage (VTT) that tracks VDDQ, plus a buffered REFOUT. Input range 2.375V-3.5V; package is 10-pin SON (DRC).
Low dropout, fast transient response for DDR bus termination, and power-good indication. Supports DDR2/DDR3/DDR4 memory interfaces.
DDR memory termination on servers, PCs, networking gear and embedded systems requiring VTT/VREF rails.
TPS51200DRCR is a common TI part with multiple alternate sources (e.g., APL3513). HuaXinGou verifies stock, batch and package.
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